Data flow description Study materials
Learning Objectives
• Describe the continuous assignment
(assign) statement, restrictions on the assign statement, and the implicit
continuous assignment statement.
• Assignment delay, implicit assignment
delay, and net declaration delay for continuous assignment statements.
• Define expressions, operators, and
operands.
• List operator types for all possible
operations.
arithmetic, logical, relational,
equality, bitwise, reduction, shift, concatenation, and conditional.
• Use dataflow constructs to model
practical digital circuits in Verilog.
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